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d a t a sh eet product speci?cation supersedes data of 1999 oct 28 file under integrated circuits, ic22 2000 jan 18 integrated circuits SAA8112HL digital camera signal processor and microcontroller
2000 jan 18 2 philips semiconductors product speci?cation digital camera signal processor and microcontroller SAA8112HL contents 1 features 2 applications 3 general description 4 quick reference data 5 ordering information 6 block diagram 7 pinning 8 functional description 8.1 synchronization and video windows 8.2 optical black processing 8.3 colour extractor 8.4 colour matrix 8.4.1 rgb processing 8.5 yuv processing 8.5.1 y processing 8.5.2 uv processing 8.6 output formatter 8.7 measurement engine 8.8 display features 8.9 microcontroller 8.10 mode control 8.11 snert (uart) interface - dsp registers 9 limiting values 10 thermal characteristics 11 operating characteristics 12 electrical characteristics 13 application information 14 package outline 15 soldering 15.1 introduction to soldering surface mount packages 15.2 reflow soldering 15.3 wave soldering 15.4 manual soldering 15.5 suitability of surface mount ic packages for wave and reflow soldering methods 16 definitions 17 life support applications 18 purchase of philips i 2 c components
2000 jan 18 3 philips semiconductors product speci?cation digital camera signal processor and microcontroller SAA8112HL 1 features high precision digital processing with 8- to 10-bit input embedded microcontroller (80c51 core based) for control loops auto optical black (aob), auto white balance (awb) and auto exposure (ae) supports a large number of sensors rgb bayer or mosaic (yellow, magenta, green and cyan) colour processing black and white processing without loss of resolution compatible with interlaced or progressive modes processes up to 800 active pixels per line optical black processing programmable colour matrix programmable r, g and b offsets programmable knee and gamma correction programmable edge enhancement false colour detection and correction y and uv adjustable coring filters flexible measurement engine (me) with up to 16 measurements per frame in 16 programmable windows programmable measurement conditions on y, u and v 8-bit yuv output with selectable formats: C yuv 4:2:2 ccir656 with signal embedded synchronization codes (sav/eav) C selectable yuv output format 4 : 0 : 0, 4 :1:1, 4:2:2and4:4:4 (according to ieee-1394 based digital camera specification) C basic output window cutter and scaler. programmable output clock for switched mode power supply 3-wire/13-bit interface for control of the tda878x family (cds + ags + 10-bit adc). 2 applications pc camera videophone security camera camcorder. 3 general description the SAA8112HL is a powerful and versatile 10-bit digital processor for video cameras. it processes the digitized sensor data and converts it to a high quality, multi-format and yuv digital signal. in addition, the SAA8112HL performs programmable statistical measurements on the video stream allowing, for instance, a precise measurement of the exposure or the white balance levels. an 80c51 microcontroller derivative with five i/o ports, i 2 c-bus, 512 bytes of ram and 32 kbytes of program memory is also embedded in the SAA8112HL. the microcontroller is used in combination with the digital signal processing (dsp) measurement capabilities to provide advanced ae, awb and aob. the microcontroller may also be used to control other devices in the camera, for example a usb or a 1394 interface. in the following description of the SAA8112HL, four main functional blocks are given (see fig.1): the dsp block the dsp me block the microcontroller block the timing, interface and miscellaneous functions block.
2000 jan 18 4 philips semiconductors product speci?cation digital camera signal processor and microcontroller SAA8112HL 4 quick reference data measured over full voltage and temperature range: v ddd = 3.3 v 10%; t amb = 0 to 70 c; unless otherwise stated. 5 ordering information symbol parameter conditions min. typ. max. unit v ddd digital supply voltage 3.0 3.3 3.6 v i ddd(tot) total supply current v ddd = 3.6 v t amb =70 c -- 80 ma v i input voltage 3. 0vSAA8112HL lqfp100 plastic low pro?le quad ?at package; 100 leads; body 14 14 1.4 mm sot407-1
2000 jan 18 5 philips semiconductors product speci?cation digital camera signal processor and microcontroller SAA8112HL this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here inthis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force landscape pages to be ... 6 block diagram a ndbook, full pagewidth fce338 snert interface digout display rgb to yuv micro- controller 80c51 p2 p3 p4 p0 p1 uv-processing measurement engine internal window timing and control y-processing rgb processing rgb separation (incl. lms) vh reference timing offset pre- processing miscellaneous functions 49 psen sdata sclk strobe smp 17 to 19, 2 ccd9 to ccd0 v ddd1 to v ddd4 v dd1 to v dd5 5 to 14 1, 3, 16, 68 29 to 33 5 p2.7 to p2.3 81 to 84 88 to 91 8 yuv7 to yuv0 79, 77 to 75 4 llc, href, vs, pxq 34 to 36 3 p2.2 to p2.0 20 p1.7/sda 39 to 46 8 p0.7 to p0.0 10 4 78, 87, 94, 37, 47 5 dgnd1 to dgnd4 gnd1 to gnd5 100, 4, 15, 67 4 80, 86, 92, 38, 48 5 4 clk1 clk2 99, 93 2 m dsprst 85, 98 2 hd vd fi 95 to 97 3 50 ale 21 p1.6/scl 22 to 27 6 p1.5 to p1.0 3 69 to 71 ucclk ucm ucrst p3.7/rd p3.6/wr p3.5/ t1 p3.4/ t0 p3.3/int1 p3.2/int0 p3.1/ txd p3.0/ rxd 73 snda 2 72, 74 sncl, snres 28 8 59 to 66 p4.7 to p4.0 2 51, 52 4 53 to 56 2 57, 58 SAA8112HL ea fig.1 block diagram.
2000 jan 18 6 philips semiconductors product speci?cation digital camera signal processor and microcontroller SAA8112HL 7 pinning symbol pin i/o description v ddd1 1 p digital supply voltage 1 for the dsp core (switchable supply domain) smp 2 o switched mode pulse for dc-to-dc power supply v ddd2 3 p digital supply voltage 2 for input buffers and predrivers dgnd2 4 p digital ground 2 for input buffers and predrivers and for the digital core ccd9 5 i (preprocessed) ad-converted ccd; bit 9 ccd8 6 i (preprocessed) ad-converted ccd; bit 8 ccd7 7 i (preprocessed) ad-converted ccd; bit 7 ccd6 8 i (preprocessed) ad-converted ccd; bit 6 ccd5 9 i (preprocessed) ad-converted ccd; bit 5 ccd4 10 i (preprocessed) ad-converted ccd; bit 4 ccd3 11 i (preprocessed) ad-converted ccd; bit 3 ccd2 12 i (preprocessed) ad-converted ccd; bit 2 ccd1 13 i (preprocessed) ad-converted ccd; bit 1 ccd0 14 i (preprocessed) ad-converted ccd; bit 0 dgnd3 15 p digital ground 3 for input buffers and predrivers and for the digital core v ddd3 16 p digital supply voltage 3 for input buffers and predrivers and for the 80c51 core sclk 17 o serial clock output to preprocessor sdata 18 o serial data output to preprocessor strobe 19 o strobe signal to preprocessor p1.7/sda 20 i/o port 1 bidirectional; bit 7/slave i 2 c-bus data i/o p1.6/scl 21 i/o port 1 bidirectional; bit 6/slave i 2 c-bus clock input p1.5 22 i/o port 1 bidirectional; bit 5 p1.4 23 i/o port 1 bidirectional; bit 4 p1.3 24 i/o port 1 bidirectional; bit 3 p1.2 25 i/o port 1 bidirectional; bit 2 p1.1 26 i/o port 1 bidirectional; bit 1 p1.0 27 i/o port 1 bidirectional; bit 0 ea 28 i external access select - internal or external program memory (active low) p2.7 29 o port 2 output; bit 7 p2.6 30 o port 2 output; bit 6 p2.5 31 o port 2 output; bit 5 p2.4 32 o port 2 output; bit 4 p2.3 33 o port 2 output; bit 3 p2.2 34 i/o port 2 bidirectional; bit 2 p2.1 35 i/o port 2 bidirectional; bit 1 p2.0 36 i/o port 2 bidirectional; bit 0 v dd4 37 p supply voltage 4 for output buffers gnd4 38 p ground 4 for output buffers p0.7 39 i/o port 0 bidirectional; bit 7 p0.6 40 i/o port 0 bidirectional; bit 6
2000 jan 18 7 philips semiconductors product speci?cation digital camera signal processor and microcontroller SAA8112HL p0.5 41 i/o port 0 bidirectional; bit 5 p0.4 42 i/o port 0 bidirectional; bit 4 p0.3 43 i/o port 0 bidirectional; bit 3 p0.2 44 i/o port 0 bidirectional; bit 2 p0.1 45 i/o port 0 bidirectional; bit 1 p0.0 46 i/o port 0 bidirectional; bit 0 v dd5 47 p supply voltage 5 for output buffers gnd5 48 p ground 5 for output buffers psen 49 o program store enable output for external memory (active low) ale 50 o address latch enable output for external latch p3.7/ rd 51 o port 3 output; bit 7/external data memory read output (active low) p3.6/ wr 52 o port 3 output; bit 6/external data memory write output (active low) p3.5/t1 53 i port 3 input; bit 5/timer 1 external input p3.4/t0 54 i port 3 input; bit 4/timer 0 external input p3.3/int1 55 i port 3 input; bit 3/external interrupt 1 p3.2/int0 56 i port 3 input; bit 2/external interrupt 0 p3.1/txd 57 i/o port 3 input; bit 1/serial output port (uart) p3.0/rxd 58 i/o port 3 input; bit 0/serial input port (uart) p4.7 59 i/o port 4 bidirectional; bit 7 p4.6 60 i/o port 4 bidirectional; bit 6 p4.5 61 i/o port 4 bidirectional; bit 5 p4.4 62 i/o port 4 bidirectional; bit 4 p4.3 63 i/o port 4 bidirectional; bit 3 p4.2 64 i/o port 4 bidirectional; bit 2 p4.1 65 i/o port 4 bidirectional; bit 1 p4.0 66 i/o port 4 bidirectional; bit 0 dgnd4 67 p digital ground 4 for input buffers and predrivers and to the digital core v ddd4 68 p digital voltage 4 for input buffers and predrivers and to the digital core ucclk 69 i clock for internal 80c51 ucm 70 i (test) mode control signal for internal 80c51 ucrst 71 i power-on reset for internal 80c51 sncl 72 i clock for dsp-snert interface (uart mode 0) snda 73 i/o data i/o for dsp-snert interface (uart mode 0) snres 74 i reset for dsp-snert interface (uart mode 0) pxq 75 o pixel quali?er output for yuv-port vs 76 o vertical synchronization output for yuv-port href 77 o horizontal reference output for yuv-port v dd1 78 p supply voltage 1 for output buffers llc 79 o line-locked clock (delayed clk2) for yuv-port gnd1 80 p ground 1 for output buffers yuv7 81 o multiplexed yuv; bit 7 symbol pin i/o description
2000 jan 18 8 philips semiconductors product speci?cation digital camera signal processor and microcontroller SAA8112HL yuv6 82 o multiplexed yuv; bit 6 yuv5 83 o multiplexed yuv; bit 5 yuv4 84 o multiplexed yuv; bit 4 m 85 i (test) mode control signal for dsp core gnd2 86 p ground 2 for output buffers v dd2 87 p supply voltage 2 for output buffers yuv3 88 o multiplexed yuv; bit 3 yuv2 89 o multiplexed yuv; bit 2 yuv1 90 o multiplexed yuv; bit 1 yuv0 91 o multiplexed yuv; bit 0 gnd3 92 p ground 3 for output buffers clk2 93 i double pixel clock input v dd3 94 p supply voltage 3 for output buffers hd 95 i horizontal de?nition input vd 96 i vertical de?nition input fi 97 i ?eld identi?cation input dsprst 98 i power-on reset for dsp clk1 99 i pixel clock input dgnd1 100 p digital ground 1 for input buffers and predrivers and for the digital core symbol pin i/o description
2000 jan 18 9 philips semiconductors product speci?cation digital camera signal processor and microcontroller SAA8112HL handbook, full pagewidth 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 80 79 78 77 76 gnd1 llc v dd1 href vs pxq snres snda sncl ucrst ucm ucclk v ddd4 dgnd4 p4.0 p4.1 p4.2 p4.3 p4.4 p4.5 p4.6 p4.7 p3.0/rxd p3.1/txd p3.2/int0 p3.3/int1 p3.4/t0 p3.5/t1 p3.6/wr p3.7/rd v ddd1 smp v ddd2 dgnd2 ccd9 ccd8 ccd7 ccd6 ccd5 ccd4 ccd3 ccd2 ccd1 ccd0 dgnd3 v ddd3 sclk sdata strobe p1.7/sda p1.6/scl p1.5 p1.4 p1.3 p1.2 dgnd1 clk1 dsprst fi vd hd v dd3 clk2 gnd3 yuv0 yuv1 yuv2 yuv3 v dd2 gnd2 m yuv4 yuv5 yuv6 yuv7 p2.5 p2.4 p2.3 p2.2 p2.1 p2.0 v dd4 gnd4 p0.7 p0.6 p0.5 p0.4 p0.3 p0.2 p0.1 p0.0 v dd5 gnd5 ale p1.1 p1.0 ea p2.7 p2.6 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 SAA8112HL fce339 psen fig.2 pin configuration.
2000 jan 18 10 philips semiconductors product speci?cation digital camera signal processor and microcontroller SAA8112HL 8 functional description the SAA8112HL dsp block has a very high level of programmability. the dsp alone uses 95 (8-bit) registers (more registers are used for the me). the SAA8112HL can accept 8- to 10-bit digital data from various sensors: ccd or cmos, progressive or interlaced, with or without colour filters (see table 1). with b and w sensors, the full resolution is preserved. the dsp registers are accessed through a serial interface (uart). 8.1 synchronization and video windows to work properly, the SAA8112HL needs four or five input synchronization signals: clk1 (pixel clock) clk2 (2 times the pixel clock) hd (horizontal reference) vd (vertical reference) fi (field id, useless for progressive scanning). the incoming ccd data is sampled on the rising edge of clk1. the phase difference between clk1 and clk2 must be fixed. the dsp working areas can be programmed and defined with reference to the rising edges of hd and vd. several registers allow the definition of the optical black window, the active video input window, the active video output window and the measurement windows. with interlaced applications, the windows are defined separately for the odd and the even fields. the number of active pixels per line is limited to 800, although the total number of pixels can be higher. there is no size limitation in the vertical direction. 8.2 optical black processing the first processing block of the SAA8112HL is a digital clamp (denoted as offset pre_processing in fig.1). it is used to align the optical black level to zero or to any arbitrary value. when the digital clamp is set active, the average value of the black is measured in the programmable optical black window and then subtracted from the input signal. a separate measurement is done for odd and even pixels and for odd and even frames. when the digital clamp is set inactive, it is possible to subtract a fixed value from the incoming data stream. a different value can be programmed for odd/even pixels, odd/even fields and odd/even lines. the optical black window has a fixed size of 16 pixels (horizontally) by 128 (vertically), although the position of this window is fully programmable. table 1 typical SAA8112HL compatible sensors sensor type brand part number vga sony icx084 and icx098 panasonic mn3777 sharp lz24bp hr sony icx058, icx059, icx068, icx069, icx208 and icx209 sharp lz2453 and lz2463 mr sony icx054, icx086 and icx206 sharp lz2413 and lz2423 toshiba tcm5391ap panasonic mn37210fp cif sharp lz244d and lz2547 other sensors all sensors that ful?l the following criteria: b and w; complementary mosaic or rgb bayer colour filter 8-, 9- or 10-bit input up to 800 active pixels per line cmos or ccd sensors interlaced; progressive and non-interlaced sensors.
2000 jan 18 11 philips semiconductors product speci?cation digital camera signal processor and microcontroller SAA8112HL 8.3 colour extractor the SAA8112HL colour extractor (denoted as rgb separation in fig.1) can be programmed to work with both mosaic (yellow, magenta, green and cyan) and rgb bayer colour sensors. with mosaic sensors, a combination (either sum or subtraction) of consecutive pixels is used to extract a y, (2r-g) and (2b-g) triplet for all pixels. with rgb bayer sensors, an rgb triplet is interpolated for every pixel on a 3 3 neighbourhood matrix. with b and w sensors, the colour extractor can be disabled, thus maintaining the full sensor resolution. edges and video level information (white clip) are extracted at this stage (see fig.3). handbook, full pagewidth fce340 line memory line memory r g b 10 ccd inputs white clip rgb colour separation edges fig.3 rgb separation diagram.
2000 jan 18 12 philips semiconductors product speci?cation digital camera signal processor and microcontroller SAA8112HL 8.4 colour matrix a programmable 3 3 colour matrix (see fig.4) is used to convert the extracted colour information, either y, (2r-g), (2b-g) or r, g and b from the sensor colour space into a standard rgb colour space. with b and w sensors, a unity matrix is used. 8.4.1 rgb processing at the colour matrix output, the video signal is in rgb format. the following processing is applied on the rgb signals in this order: the gain of the red and blue streams can be changed to control the white balance a black offset (positive or negative) correction can be applied independently on each of the r, g and b signals a knee function with adjustable gain and threshold can be applied to the signal to compress the highlights finally, a gamma function is applied; the gamma curve is adjustable. the same knee and gamma functions are applied on the three r, g and b signals. handbook, full pagewidth fce341 r g b r or (2r - g) g or y b or (2b - g) colour matrix knee gamma r gain r black + g black + b gain b black + fig.4 rgb processing diagram.
2000 jan 18 13 philips semiconductors product speci?cation digital camera signal processor and microcontroller SAA8112HL 8.5 yuv processing following the rgb processing, the r, g and b signals are converted to yuv 4 :2:2 by a fixed matrix (see fig.5). then, the luminance and chrominance signals are processed separately. 8.5.1 y processing the luminance processing consists of edge enhancement and noise reduction (see fig.5). the edge enhancement feature is very flexible. first, it is possible to adjust the bandwidth and the level of the edge detection. secondly, the amount of edge enhancement can be independently adjusted for the horizontal or vertical edge or for the high or low frequency edges. the edge detection is also used for the false colour correction. the noise reduction on the luminance signal is done by a coring filter. the amount of coring is adjustable. handbook, full pagewidth fce342 uv y r g b conversion matrix down- sampling and mux fig.5 rgb to yuv conversion. handbook, full pagewidth fce343 false colour edges y y edge processing and false colour detection y gain + noise reduction fig.6 y processing.
2000 jan 18 14 philips semiconductors product speci?cation digital camera signal processor and microcontroller SAA8112HL 8.5.2 uv processing the chrominance processing consists of noise reduction and colour error correction (see fig.7). symmetrical processing is done on the two chrominance signals. the noise reduction is done by an adjustable coring filter. the edge detection and the luminance level are used to reduce the colour errors caused by high exposure or sharp colour transitions. it is possible to adjust the number of pixels on which the correction is applied. with the sharp colour transition, the colour signal is filtered. with over exposure, the colour signal is cancelled. the yuv processing block is terminated by three separate gain controls on the y, u and v signals. these gains can be used to fine tune the y, u and v colour balance and also to adjust the luminance and saturation without impacting the ae and awb control loops. handbook, full pagewidth fce344 uv uv noise reduction false colour correction uv gain control fig.7 uv processing.
2000 jan 18 15 philips semiconductors product speci?cation digital camera signal processor and microcontroller SAA8112HL 8.6 output formatter the last processing block of the SAA8112HL (denoted as digout in fig.1) is a flexible output formatter, which performs two main tasks (see table 2): scaling synchronization generation. a scaler can be used to divide the horizontal or vertical resolution by two or four (high quality fir filters are used to avoid artifacts). also, a cif (352 288) cut can be made from a vga sensor. if not used, the scaler can be bypassed. the output format is usually yuv 4 : 2 : 2. the yuv samples are multiplexed on a single 8-bit output port. the output data is in synchronization with the output clock (llc). the output data rate is twice the pixel frequency. synchronization codes sav and eav are inserted before and after the active line, as described in ccir/itu656. in addition, three other synchronization signals are available: href: horizontal reference. this pulse usually goes high with the first active data and goes low after the last active data. href does not usually include the sav and eav codes. to accommodate various sensor sizes, the start and stop positions of href are programmable. vs: vertical synchronization. pxq: pixel qualifier; this pulse goes high with every valid pixel, including the sav/eav codes. it goes low when there are invalid pixels in a line, for example, when the scaler is used. the SAA8112HL output formatter also features an ieee1394 mode, which helps to support applications defined around the 1394-based digital camera specification of the ieee1394 trade association. in this case, the href, vs and pxq signals are designed to help to packetize the video according to the following mode of the 1394-based digital camera specification : format_0 (vga), mode_0: 160 120 yuv( 4:4:4);24 bits/pixel format_0 (vga), mode_1: 320 240 yuv( 4:2:2);16 bits/pixel format_0 (vga), mode_2: 640 480 yuv( 4:1:1);12 bits/pixel format_0 (vga), mode_3: 640 480 yuv( 4:2:2);16 bits/pixel format_0 (vga), mode_5: 640 480 y (b and w); 8 bits/pixel. for mode_0 and mode_2, the yuv 4 : 2 : 2 output is filtered to obtain 4:1:1 or 4:4:4. with the ieee1394 mode, the definition of the output synchronization pulses is changed as described below: href goes high during the first valid byte of a packet; it is low elsewhere vs can be programmed in length and position; this pulse can be used to set the sy field of the 1394 header to 1 for the first isochronous packet of a frame pxq goes high during the valid y, u or v data llc remains the output clock and is synchronized with the data output. table 2 typical cutter and scaler modes note 1. with the hr sensor, the active area before scaling is 704 576 (pal) or 704 486 (ntsc). therefore, the formats generated by the scaler are: cif 352 288 (pal), 325 243 (ntsc) and qcif 176 144 (pal and ntsc). sensor type output format cutter/scaler modes vga sif 320 240 scaled half horizontally and vertically qsif 160 120 scaled quarter horizontally and vertically high resolution cif 352 288 scaled half horizontally and vertically cut qcif 176 144 scaled quarter horizontally and vertically cut cut then scaled half horizontally and vertically cif qcif 176 144 scaled half horizontally and vertically
2000 jan 18 16 philips semiconductors product speci?cation digital camera signal processor and microcontroller SAA8112HL 8.7 measurement engine the me extracts statistical information from the video stream. these measurements are used to automatically control the white balance and the exposure. they can also be used for other purposes, such as colour detection. the measurements are performed on pre-formatted y, u and v streams (see fig.5). it is possible to measure the accumulated value of the y, u or v samples in any of 16 programmable windows. it is also possible to measure the accumulated value of the y signal below a threshold or the number of y samples above a threshold. moreover, it is possible to only accumulate u and v values for which programmable conditions on y, u and v are fulfilled. the me does up to 16 statistic measurements per frame (8 per field). each measurement can be done on any of the pre-formatted signals and on any of the programmable windows. a memory area of the SAA8112HL, called ram workspace, is used to handle the me operations. in addition to the me, a highlight counter is available, which counts the number of pixels above a programmable threshold. the highlight counter is usually used for exposure control. 8.8 display features the SAA8112HL also offers the possibility of visualizing selected zones of interests or selected pixels. the visualization is done either by contrast reduction for the selected pixels or by constant level insertion. handbook, full pagewidth fce345 SAA8112HL processing ram workspace accumulator a accumulator b y awb u awb v awb y ae ccd9 to ccd0 yuv output measurement engine snert interface microcontroller (80c51) fig.8 measurement engine.
2000 jan 18 17 philips semiconductors product speci?cation digital camera signal processor and microcontroller SAA8112HL 8.9 microcontroller the embedded microcontroller is basically a 80c654 core (80c51 family) with five ports. its functionality is standard, except that the ports are dedicated inputs, outputs or i/o ports (see chapter 7). ports p0 and p2 are available for connection to an emulator or to an external program prom. the microcontroller can control the ae and the awb loops and can download the settings for the dsp registers from an optional eeprom at power-up or reset, for instance. the microcontroller includes the following features: 32 kbyte internal rom 512 byte ram hardware i 2 c-bus interface: p1.7 and p1.6 hardware uart interface: p3.0 and p3.1 power-down mode two timers p4 is an open-drain port p0, p1, p2 and p3 are pull-up ports. table 3 80c51 special function registers sfr name description sfr add data bit 7 data bit 6 data bit 5 data bit 4 data bit 3 data bit 2 data bit 1 data bit 0 b b register f0h b7 b6 b5 b4 b3 b2 b1 b0 acc accumulator e0h acc7 acc6 acc5 acc4 acc3 acc2 acc1 acc0 siadr serial interface address dbh sa6 sa5 sa4 sa3 sa2 sa1 sa0 gc sidat serial interface data dah sd7 sd6 sd5 sd4 sd3 sd2 sd1 sd0 sista serial interface status d9h st7 st6 st5 st4 st3 0 0 0 sicon serial interface control d8h cr2 ens1 sta sto si aa cr1 cr0 psw program status word d0h cy ac f0 rs1 rs0 ov - p p4 port 4 c0h p4.7 p4.6 p4.5 p4.4 p4.3 p4.2 p4.1 p4.0 ip interrupt priority b8h - ip6 ip5 ip4 pt1 px1 pt0 px0 p3 port 3 b0h rd wr t1 t0 int1 int0 txd rxd ie interrupt enable a8h ea ie6 ie5 ie4 et1 ex1 et0 ex0 p2 port 2 a0h ad15 ad14 ad13 ad12 ad11 ad10 ad9 ad8 sbuf serial data buffer 99h -------- scon serial controller 98h sm0 sm1 sm2 ren tb8 rb8 t1 r1 p1 port 1 90h sda scl p1.5 p1.4 p1.3 p1.2 p1.1 p1.0 th1 timer high 1 8dh -------- th0 timer high 0 8ch -------- tl1 timer low 1 8bh -------- tl0 timer low 0 8ah -------- tmod timer mode 89h gate c/t m1 m0 gate c/t m1 m0 tcon timer control 88h tf1 tr1 tf0 tr0 ie1 it1 ie0 it0 pcon power control 87h ------ pd idl dph data pointer high 83h -------- dpll data pointer low 82h -------- sp stack pointer 81h sp7 sp6 sp5 sp4 sp3 sp2 sp1 sp0 p0 port 0 80h ad7 ad6 ad5 ad4 ad3 ad2 ad1 ad0
2000 jan 18 18 philips semiconductors product speci?cation digital camera signal processor and microcontroller SAA8112HL 8.10 mode control two pins are dedicated to control the operational modes of the SAA8112HL: pin m for the dsp and pin ucm for the microcontroller (see table 4). they are independent of each other. table 4 mode control 8.11 snert (uart) interface - dsp registers the dsp registers can be accessed via a snert interface. this snert interface is equivalent to the uart mode 0 interface of the 80c51 microcontroller. the dsp register list is shown in table 5. m ucm mode 0 0 dsp application mode 1 0 dsp test mode 0 0 microcontroller application mode 0 1 microcontroller test mode table 5 register list addr name function format range 0 control0 see table 6 for explanation byte n.a. 1 control1 see table 7 for explanation byte n.a. 2 control2 see table 8 for explanation byte n.a. 3 reserved1 --- 4 ob_startl_f0 ?rst line in optical black window in ?eld 0 byte [0 to 255] 5 ob_startl_f1 ?rst line in optical black window in ?eld 1 byte 256 + [0 to 255] 6 reserved2 --- 7 ob_startp ?rst pixel in optical black window byte 4 [0 to 255] 8 ob_pe_f0 ?xed optical black level for even pixel in ?eld 0 byte [0 to 127] 9 ob_po_f0 ?xed optical black level for odd pixel in ?eld 0 byte [0 to 127] 10 ob_pe_f1 ?xed optical black level for even pixels in ?eld 1 byte [0 to 127] 11 ob_po_f1 ?xed optical black level for odd pixels in ?eld 1 byte [0 to 127] 12 ob_offset_le optical black offset for even lines byte [0 to 255] 13 ob_offset_lo optical black offset for odd lines byte [0 to 255] 14 pre_mat_k1 factors for ccd (even pixels and lines; odd ?elds) byte [0 to 255]/256 15 pre_mat_k2 factors for ccd (even lines and ?elds; odd pixels) byte [0 to 255]/256 16 pre_mat_k3 factors for ccd (even pixels; odd lines and ?elds) byte [0 to 255]/256 17 pre_mat_k4 factors for ccd (odd pixels and lines; even ?elds) byte [0 to 255]/256 18 white_clip_thr threshold for white clip detector byte 768 to 1023 19 col_mat_p11 colour matrix coef?cient p11 byte [ - 128 to +127]/16 20 col_mat_p12 colour matrix coef?cient p12 byte [ - 128 to +127]/16 21 col_mat_p13 colour matrix coef?cient p13 byte [ - 128 to +127]/16 22 col_mat_p21 colour matrix coef?cient p21 byte [ - 128 to +127]/16 23 col_mat_p22 colour matrix coef?cient p22 byte [ - 128 to +127]/16 24 col_mat_p23 colour matrix coef?cient p23 byte [ - 128 to +127]/16 25 col_mat_p31 colour matrix coef?cient p31 byte [ - 128 to +127]/16 26 col_mat_p32 colour matrix coef?cient p32 byte [ - 128 to +127]/16
2000 jan 18 19 philips semiconductors product speci?cation digital camera signal processor and microcontroller SAA8112HL 27 col_mat_p33 colour matrix coef?cient p33 byte [ - 128 to +127]/16 28 col_mat_rgain red gain for white balance correction byte [0 to 255]/128 29 col_mat_bgain blue gain for white balance correction byte [0 to 255]/64 30 pre_mat_k5 factors for ccd (odd pixels and ?elds; even lines) byte [0 to 255]/256 31 pre_mat_k6 factors for ccd (even pixels and ?elds; odd lines) byte [0 to 255]/256 32 pre_mat_k7 factors for ccd (odd pixels, lines and ?elds) byte [0 to 255]/256 33 pre_mat_k8 factors for ccd (even pixels, lines and ?elds) byte [0 to 255]/256 34 black_level_r ?xed black offset in red channel byte [ - 128 to +127] 35 black_level_g ?xed black offset in green channel byte [ - 128 to +127] 36 black_level_b ?xed black offset in blue channel byte [ - 128 to +127] 37 rgb_knee_offset offset of the knee compression byte [0 to 255] 38 gamma_dith control of gamma dithering (msb) 2 bits [0 to 3] gamma_balance control of gamma level (lsb) 6 bits [0 to 63]/64 39 npix_lsb total number of pixels on a line byte [0 to 255] 40 npix_msb most signi?cant bits of total number of pixels/line 2 bits [0 to 3] 41 fpix_act address of the ?rst active pixel on a line byte [0 to 255] 42 lpix_act_lsb address of the last active pixel on a line byte [0 to 255] 43 fline_act_f0 address of the ?rst active line in ?eld 0 byte [0 to 255] 44 lline_act_f0_lsb address of the last active line in ?eld 0 byte [0 to 1023] 45 fline_act_f1_lsb address of the ?rst active line in ?eld 1 byte [0 to 1023] 46 lline_act_f1_lsb address of the last active line in ?eld 1 byte [0 to 1023] 47 act_lines_msb msbs of active line numbers (see table 9) byte n.a. 48 ctr_upd_line number of line for db update of control registers byte [0 to 255] 49 vc_cntrl vertical contour control (see table 10) bit n.a. 50 cldlev contour level dependency level byte [0 to 255] 51 hclgain horizontal contour bpf low gain nibble [0 to 15]/16 hchgain horizontal contour bpf high gain nibble [0 to 15]/16 52 cnclev total contour noise coring level 6 bits [0 to 63] 53 congain total contour gain byte [0 to 63]/16 54 fcdlev false colour detection level byte [0 to 255] 55 ynclev luminance noise coring level byte [0 to 127]/4 56 ygain luminance gain byte [0 to 255]/128 57 gnonunilev green non-uniformity level byte [0 to 255] 58 uvnclev chrominance noise coring level byte [0 to 255]/4 59 ugain u gain byte [0 to 255]/128 60 vgain v gain byte [0 to 255]/128 61 controlx green non-uniformity control (see table 11) bit n.a. 62 cif_hfil_cntrl cif horizontal ?lter control (see table 12) bit n.a. 63 hrefstrt href signal start position byte [0 to 255]/256 64 hrefstplsb href signal stop position (lsb) byte [0 to 255] 65 hrefstpmsb href signal stop position (msb) (see table 13) bit n.a. addr name function format range
2000 jan 18 20 philips semiconductors product speci?cation digital camera signal processor and microcontroller SAA8112HL 66 a awb_a (me) byte [ - 128 to +127]/128 67 b awb_b (me) byte [ - 128 to +127]/128 68 c awb_c (me) byte [ - 128 to +127]/128 69 d awb_d (me) byte [ - 128 to +127]/128 70 e awb_e (me) 6 bits [0 to 63] 71 f awb_f (me) 6 bits [0 to 63] 72 highlightthr highlight threshold (me) byte [0 to 255] 73 me_resscale me result of scaler (see table 14) 4 bits n.a. 74 mwhvgrid vertical (4 msbs) and horizontal (4 lsbs) window me size byte [0 to 15] 75 dispcntrl overlay control bit n.a. 76 ydisplev overlay control byte [0 to 255] 77 dmwsel overlay control bit n.a. 78 vf_tggle vf and fi toggle position byte [0 to 255] + 256 79 cifhwin cif horizontal input window control byte 4 [0 to 255] 80 outf_avsc output format selection register and avsync (href) period selection (see table 15) bit n.a. 81 sy_gen sy pulse generation control (see table 16) bit n.a. 82 dop_cntrl0 digital output processing control (see table 17) bit n.a. 83 dop_cntrl1 digital output processing control (see table 18) bit n.a. 84 cif_hpstrtl address (lsb) of ?rst pixel in cif cutting window byte [0 to 255] 85 cif_vlstrtl address (lsb) of ?rst line in cif cutting window byte [0 to 255] 86 pre_si_lsb control data for analog preprocessing byte [0 to 255] 87 pre_si_msb control data and address for analog preprocessing (see table 19) bit n.a. 88 smp_cntrl switched mode power supply control byte [0 to 255] 89 cifvwin cif vertical input window control byte 4 [0 to 255] 90 dig_setup set-up level in digital output byte [0 to 255] 91 reserved3 --- 92 reserved4 --- 93 reserved5 --- 94 pre_proc_del control compensation delay w.r.t. preprocessing 4 bits [0 to 15] 126 ramwrptr ram write pointer to internal workspace byte [0 to 223] 127 ramwrdata ram write data to internal workspace byte [0 to 255] addr name function format range
2000 jan 18 21 philips semiconductors product speci?cation digital camera signal processor and microcontroller SAA8112HL table 6 register control0 (address: 0x00h) table 7 register control0 (address: 0x01h) bit parameter 76543210 description name auto optical black control: auto_opt_black 1on 0 off type of sensor: sens_vga 1 rgb bayer ccd (vga) 0 complementary mosaic ccd (pal/ntsc) type of colour ?lter (if sens_vga = 0): mosaic_fil_type 1 filter type b 0 filter type a colour separator (if sens_vga = 1): rgc 1on 0 off (raw data mode) 1 synchronizes the colour separator on pixel level pix_phase 1 synchronizes the colour separator on line level line_phase 1 synchronizes the colour separator on ?eld level field_phase 00 reserved bit parameter 76543210 description name 0 0 reserved compression factor for rgb knee: rgb_knee_k 11 1 2 10 3 8 01 1 4 00 1 8 selection of ?lter characteristics of uv downsample ?lters: med_res 1 for medium resolution sensors 0 for high resolution sensors video mode selection: pal_ntsc 1pal 0 ntsc 00 reserved
2000 jan 18 22 philips semiconductors product speci?cation digital camera signal processor and microcontroller SAA8112HL table 8 register control2 (address: 0x02h) x = dont care. table 9 register act_lines_msb (address: 0x2fh) table 10 register vc_cntrl (address: 0x31h) x = dont care. bit parameter 76543210 description name 1 false colour low pass ?lter (on = high) fcc_filter 1 non-interlaced mode selection ni 0 0 reserved white clip mapping on uv grid wh_cl_map 1 x [11111] spreading filter, kills 5 uv samples 0 1 [01110] spreading filter, kills 3 uv samples 0 0 [00100] spreading filter, kills only current uv sample switch control for false colour concealment signal fc_map 1 x [11111] spreading filter, conceals 5 uv samples 0 1 [01110] spreading filter, conceals 3 uv samples 0 0 [00100] spreading filter, conceals only current uv sample bit parameter 76543210 description 1 bit 8 of lpix_act_lsb (0x2ah) 1 bit 9 of lpix_act_lsb (0x2ah) 1 bit 8 of lline_act_f0_lsb (0x2ch) 1 bit 9 of lline_act_f0_lsb (0x2ch) 1 bit 8 of fline_act_f1_lsb (0x2dh) 1 bit 9 of fline_act_f1_lsb (0x2dh) 1 bit 8 of lline_act_f1_lsb (0x2eh) 1 bit 9 of lline_act_f1_lsb (0x2eh) bit parameter 76543210 description name xxxxver tical contour gain (range 0 to 15) vcgain x x x vertical contour ?lter coef?cient (range 0 to 7) kcomb horizontal vc ?lter n.a. 1on 0 off
2000 jan 18 23 philips semiconductors product speci?cation digital camera signal processor and microcontroller SAA8112HL table 11 register controlx (address: 0x3dh) table 12 register cif_hfil_cntrl (address: 0x3eh) x = dont care. table 13 register hrefstpmsb (address: 0x41h) bit parameter 76543210 description vertical contour ?lter gain 1 normal 0 double 0000000 reserved bit parameter 76543210 description luminance cif horizontal ?lter control 1 x quarter bandwidth 0 1 half bandwidth 0 0 bypass, full bandwidth chrominance horizontal ?lter control 1 x quarter bandwidth 0 1 half bandwidth 0 0 bypass, full bandwidth 0000 reserved bit parameter 76543210 description 1 bit 8 of hrefstplsb (0x40h) 1 bit 9 of hrefstplsb (0x40h) 000000 reserved
2000 jan 18 24 philips semiconductors product speci?cation digital camera signal processor and microcontroller SAA8112HL table 14 register mecntrl (address: 0x4bh) x = dont care. bit parameter 76543210 description me result of scaler selection 1 1 x reserved 1 0 1 divide by 32 1 0 0 divide by 16 0 1 1 divide by 8 0 1 0 divide by 4 0 0 1 divide by 2 0 0 0 pass through me synchronization 1 in field mode 0 in frame mode 0000 reserved
2000 jan 18 25 philips semiconductors product speci?cation digital camera signal processor and microcontroller SAA8112HL table 15 register outf_avsc (address: 0x50h) x = dont care. bit parameter 76543210 description avsync (href) period (in clk1 cycles during active video) 1111 2560 clk1 cycles when avvalid (pxq) is high 1110 1920 clk1 cycles 1101 1280 clk1 cycles 1100 960 clk1 cycles 1011 640 clk1 cycles 1010 480 clk1 cycles 1001 320 clk1 cycles 1000 240 clk1 cycles 0111 160 clk1 cycles 0110 120 clk1 cycles 0101 80 clk1 cycles 0100 60 clk1 cycles 0011 40 clk1 cycles 0010 30 clk1 cycles 0001 20 clk1 cycles 0000 15 clk1 cycles output format select code 1 1 1 ieee-1394 4:4:4 mode (ieee-1384 camera mode_0) 1 1 0 ieee-1394 4:2:2 mode (ieee-1384 camera mode_1 and mode_3) 1 0 1 ieee-1394 4:1:1 mode (ieee-1384 camera mode_2) 1 0 0 ieee-1394 4:0:0 (bandw) mode (ieee-1384 camera mode_5) 0 x x standard 4:2:2 mode x msb of sy (vs) duration
2000 jan 18 26 philips semiconductors product speci?cation digital camera signal processor and microcontroller SAA8112HL table 16 register sy_gen (address: 0x51h) x = dont care. bit parameter 76543210 description sy (vs) vertical offset 1 1 1 +4 lines 1 1 0 +3 lines 1 0 1 +2 lines 1 0 0 +1 line 0 1 1 0 line 010 - 1 line 001 - 2 lines 000 - 3 lines sy polarity 1 negative 0 positive xxxx sy pulse duration code (4 lsbs) (range [0 to 32] clk2)
2000 jan 18 27 philips semiconductors product speci?cation digital camera signal processor and microcontroller SAA8112HL table 17 register dop_cntrl0 (address: 0x52h) x = dont care. bit parameter 76543210 description horizontal scaling processing control bits 1 x downsampling off 0 1 downsample by 2 0 0 downsample by 4 vertical scaling processing control bits 1 1 upsample by 2 1 0 downsampling off 0 1 downsample by 2 0 0 downsample by 4 temporal scaling processing control bits 1 1 downsample by 8 1 0 downsample by 4 0 1 downsample by 2 0 0 downsampling off scaling processing enable 1on 0 off (bypass) cif format 1 cif 0 qcif
2000 jan 18 28 philips semiconductors product speci?cation digital camera signal processor and microcontroller SAA8112HL table 18 register dop_cntrl1 (address: 0x53h) table 19 register pre_si_msb (address: 0x57h) bit parameter 76543210 description 1 bit 8 of cif_vlstrtl (0x55h) 1 bit 9 of cif_vlstrtl (0x55h) 1 bit 8 of cif_hpstrtl (0x54h) 1 bit 9 of cif_hpstrtl (0x54h) 1 use pxq output 0 use cref output sensor type 1 cif sensor 0 non-cif sensor digital output format 1d1 0 b and w for ieee-1394 clk1/clk2 interface reset 1 reset 0 free running, normal operation bit parameter 76543210 description 1 control data bits d8 1 control data bits d9 1 control address bits a0 1 control address bits a1 1 control address bits a2 0 0 0 reserved
2000 jan 18 29 philips semiconductors product speci?cation digital camera signal processor and microcontroller SAA8112HL 9 limiting values in accordance with the absolute maximum rating system (iec 134). notes 1. stress beyond these levels may cause permanent damage to the device. 2. only pin 16 is connected to the microcontroller core. 10 thermal characteristics 11 operating characteristics v ddd = 3.3 v 10%; t amb = 0 to 70 c; unless otherwise stated. symbol parameter conditions min. max. unit v ddd digital supply voltage notes 1 and 2 - 0.5 +4.0 v v dgnd digital ground voltage note 1 - 0.5 +4.0 v v i input signal voltage note 1 - 0.5 v ddd + 0.5 v v o output signal voltage note 1 - 0.5 v ddd + 0.5 v t stg storage temperature note 1 - 55 +150 c t amb ambient temperature note 1 0 70 c t j junction temperature note 1 - 40 +125 c symbol parameter conditions value unit r th(j-a) thermal resistance from junction to ambient in free air 53 k/w symbol parameter conditions min. typ. max. unit general supply v ddd digital power supply voltage 3.0 3.3 3.6 v dgnd digital ground 000v i ddd(tot) digital power supply current (total) v ddd = 3.6 v t amb =70 c -- 80 ma data and control inputs (ccd9 to ccd0, hd, vd, fi, clk1, clk2, m, dsprst, ea, ucclk, ucm and ucrst) v il low-level input voltage -- 0.8 v v ih high-level input voltage 2 -- v i 2 c-bus, uart (sclk, sdata, strobe, sncl, snda and snres) v il low-level input voltage -- 0.3 v ddd v v ih high-level input voltage 0.7 v ddd -- v data and control outputs (smp, p2.7 to p2.0, psen, ale, p0.7 to p0.0, yuv7 to yuv0, pxq, vs, href and llc) v ol low-level output voltage 0 - 0.1 v ddd v v oh high-level output voltage 0.9 v ddd - v ddd v
2000 jan 18 30 philips semiconductors product speci?cation digital camera signal processor and microcontroller SAA8112HL 12 electrical characteristics table 20 data input/output timing v ddd = 3.3 v 10%; t amb = 0 to 70 c. symbol parameter min. typ. max. unit data inputs related to clk1 (ccd9 to ccd0, hd, vd and fi) t su(i)(d) data input set-up time 2 -- ns t h(i)(d) data input hold time 1.5 -- ns data outputs related to clk2 (yuv7 to yuv0, href) t d(o)(d) data output delay time - 13.5 16 ns data outputs related to clk2 (vs and pxq) t d(o)(d) data output delay time - 7.5 10 ns handbook, full pagewidth fce346 50% 50% 50% t su(i)(d) t h(i)(d) t d(o)(d) clock data input data output fig.9 data input/output timing diagrams.
2000 jan 18 31 philips semiconductors product speci?cation digital camera signal processor and microcontroller SAA8112HL this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here inthis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force landscape pages to be ... 13 application information h andbook, full pagewidth fce347 yuv7 to yuv0 vs href llc m smp reset vd hd snres sncl snda fi clk1 clk2 sdata ccd9 to ccd0 sclk strobe data7 to data0 ale ad10 to ad8 ad15 to ad11 pxq scl sda SAA8112HL saa8117hl usb add-on ucpor ucint ucclk susreadynot ucm prom scle sdae eeprom tda878x sensor v-driver psen ea fig.10 usb application.
2000 jan 18 32 philips semiconductors product speci?cation digital camera signal processor and microcontroller SAA8112HL handbook, full pagewidth fce348 yuv7 to yuv0 vs href llc m smp reset vd hd snres sncl snda fi clk1 clk2 sdata ccd9 to ccd0 sclk strobe psen data7 to data0 ale ad10 to ad8 ad15 to ad11 pxq SAA8112HL scaler pulse pattern generator (ppg) ucpor ucint ucclk ea ucm prom scle sdae eeprom tda878x sensor v-driver fig.11 digital module application (vga pal/ntsc/cif ppg).
2000 jan 18 33 philips semiconductors product speci?cation digital camera signal processor and microcontroller SAA8112HL 14 package outline unit a max. a 1 a 2 a 3 b p ce (1) eh e ll p z y w v q references outline version european projection issue date iec jedec eiaj mm 1.6 0.20 0.05 1.5 1.3 0.25 0.28 0.16 0.18 0.12 14.1 13.9 0.5 16.25 15.75 1.15 0.85 7 0 o o 0.12 0.1 0.2 1.0 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.25 mm maximum per side are not included. 0.75 0.45 sot407-1 ms-026 97-08-04 99-12-27 d (1) (1) (1) 14.1 13.9 h d 16.25 15.75 e z 1.15 0.85 d b p e q e a 1 a l p detail x l (a ) 3 b 25 c d h b p e h a 2 v m b d z d a z e e v m a x 1 100 76 75 51 50 26 y pin 1 index w m w m 0 5 10 mm scale lqfp100: plastic low profile quad flat package; 100 leads; body 14 x 14 x 1.4 mm sot407-1
2000 jan 18 34 philips semiconductors product speci?cation digital camera signal processor and microcontroller SAA8112HL 15 soldering 15.1 introduction to soldering surface mount packages this text gives a very brief insight to a complex technology. a more in-depth account of soldering ics can be found in our data handbook ic26; integrated circuit packages (document order number 9398 652 90011). there is no soldering method that is ideal for all surface mount ic packages. wave soldering is not always suitable for surface mount ics, or for printed-circuit boards with high population densities. in these situations reflow soldering is often used. 15.2 re?ow soldering reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. typical reflow peak temperatures range from 215 to 250 c. the top-surface temperature of the packages should preferable be kept below 230 c. 15.3 wave soldering conventional single wave soldering is not recommended for surface mount devices (smds) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. to overcome these problems the double-wave soldering method was specifically developed. if wave soldering is used the following conditions must be observed for optimal results: use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. for packages with leads on two sides and a pitch (e): C larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; C smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves at the downstream end. for packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves downstream and at the side corners. during placement and before soldering, the package must be fixed with a droplet of adhesive. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. typical dwell time is 4 seconds at 250 c. a mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. 15.4 manual soldering fix the component by first soldering two diagonally-opposite end leads. use a low voltage (24 v or less) soldering iron applied to the flat part of the lead. contact time must be limited to 10 seconds at up to 300 c. when using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 c.
2000 jan 18 35 philips semiconductors product speci?cation digital camera signal processor and microcontroller SAA8112HL 15.5 suitability of surface mount ic packages for wave and re?ow soldering methods notes 1. all surface mount (smd) packages are moisture sensitive. depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). for details, refer to the drypack information in the data handbook ic26; integrated circuit packages; section: packing methods . 2. these packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. if wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. the package footprint must incorporate solder thieves downstream and at the side corners. 4. wave soldering is only suitable for lqfp, tqfp and qfp packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. wave soldering is only suitable for ssop and tssop packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. package soldering method wave reflow (1) bga, sqfp not suitable suitable hlqfp, hsqfp, hsop, htssop, sms not suitable (2) suitable plcc (3) , so, soj suitable suitable lqfp, qfp, tqfp not recommended (3)(4) suitable ssop, tssop, vso not recommended (5) suitable
2000 jan 18 36 philips semiconductors product speci?cation digital camera signal processor and microcontroller SAA8112HL 16 definitions 17 life support applications these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips for any damages resulting from such improper use or sale. 18 purchase of philips i 2 c components data sheet status objective speci?cation this data sheet contains target or goal speci?cations for product development. preliminary speci?cation this data sheet contains preliminary data; supplementary data may be published later. product speci?cation this data sheet contains ?nal product speci?cations. limiting values limiting values given are in accordance with the absolute maximum rating system (iec 134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the speci?cation is not implied. exposure to limiting values for extended periods may affect device reliability. application information where application information is given, it is advisory and does not form part of the speci?cation. purchase of philips i 2 c components conveys a license under the philips i 2 c patent to use the components in the i 2 c system provided the system conforms to the i 2 c specification defined by philips. this specification can be ordered using the code 9398 393 40011.
2000 jan 18 37 philips semiconductors product speci?cation digital camera signal processor and microcontroller SAA8112HL notes
2000 jan 18 38 philips semiconductors product speci?cation digital camera signal processor and microcontroller SAA8112HL notes
2000 jan 18 39 philips semiconductors product speci?cation digital camera signal processor and microcontroller SAA8112HL notes
? philips electronics n.v. sca all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owne r. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not con vey nor imply any license under patent- or other industrial or intellectual property rights. internet: http://www.semiconductors.philips.com 1999 68 philips semiconductors C a worldwide company for all other countries apply to: philips semiconductors, international marketing & sales communications, building be-p, p.o. box 218, 5600 md eindhoven, the netherlands, fax. +31 40 27 24825 argentina: see south america australia: 3 figtree drive, homebush, nsw 2140, tel. +61 2 9704 8141, fax. +61 2 9704 8139 austria: computerstr. 6, a-1101 wien, p.o. box 213, tel. +43 1 60 101 1248, fax. +43 1 60 101 1210 belarus: hotel minsk business center, bld. 3, r. 1211, volodarski str. 6, 220050 minsk, tel. +375 172 20 0733, fax. +375 172 20 0773 belgium: see the netherlands brazil: see south america bulgaria: philips bulgaria ltd., energoproject, 15th floor, 51 james bourchier blvd., 1407 sofia, tel. +359 2 68 9211, fax. +359 2 68 9102 canada: philips semiconductors/components, tel. +1 800 234 7381, fax. +1 800 943 0087 china/hong kong: 501 hong kong industrial technology centre, 72 tat chee avenue, kowloon tong, hong kong, tel. +852 2319 7888, fax. +852 2319 7700 colombia: see south america czech republic: see austria denmark: sydhavnsgade 23, 1780 copenhagen v, tel. +45 33 29 3333, fax. +45 33 29 3905 finland: sinikalliontie 3, fin-02630 espoo, tel. +358 9 615 800, fax. +358 9 6158 0920 france: 51 rue carnot, bp317, 92156 suresnes cedex, tel. +33 1 4099 6161, fax. +33 1 4099 6427 germany: hammerbrookstra?e 69, d-20097 hamburg, tel. +49 40 2353 60, fax. +49 40 2353 6300 hungary: see austria india: philips india ltd, band box building, 2nd floor, 254-d, dr. annie besant road, worli, mumbai 400 025, tel. +91 22 493 8541, fax. +91 22 493 0966 indonesia: pt philips development corporation, semiconductors division, gedung philips, jl. buncit raya kav.99-100, jakarta 12510, tel. +62 21 794 0040 ext. 2501, fax. +62 21 794 0080 ireland: newstead, clonskeagh, dublin 14, tel. +353 1 7640 000, fax. +353 1 7640 200 israel: rapac electronics, 7 kehilat saloniki st, po box 18053, tel aviv 61180, tel. +972 3 645 0444, fax. +972 3 649 1007 italy: philips semiconductors, via casati, 23 - 20052 monza (mi), tel. +39 039 203 6838, fax +39 039 203 6800 japan: philips bldg 13-37, kohnan 2-chome, minato-ku, tokyo 108-8507, tel. +81 3 3740 5130, fax. +81 3 3740 5057 korea: philips house, 260-199 itaewon-dong, yongsan-ku, seoul, tel. +82 2 709 1412, fax. +82 2 709 1415 malaysia: no. 76 jalan universiti, 46200 petaling jaya, selangor, tel. +60 3 750 5214, fax. +60 3 757 4880 mexico: 5900 gateway east, suite 200, el paso, texas 79905, tel. +9-5 800 234 7381, fax +9-5 800 943 0087 middle east: see italy netherlands: postbus 90050, 5600 pb eindhoven, bldg. vb, tel. +31 40 27 82785, fax. +31 40 27 88399 new zealand: 2 wagener place, c.p.o. box 1041, auckland, tel. +64 9 849 4160, fax. +64 9 849 7811 norway: box 1, manglerud 0612, oslo, tel. +47 22 74 8000, fax. +47 22 74 8341 pakistan: see singapore philippines: philips semiconductors philippines inc., 106 valero st. salcedo village, p.o. box 2108 mcc, makati, metro manila, tel. +63 2 816 6380, fax. +63 2 817 3474 poland : al.jerozolimskie 195 b, 02-222 warsaw, tel. +48 22 5710 000, fax. +48 22 5710 001 portugal: see spain romania: see italy russia: philips russia, ul. usatcheva 35a, 119048 moscow, tel. +7 095 755 6918, fax. +7 095 755 6919 singapore: lorong 1, toa payoh, singapore 319762, tel. +65 350 2538, fax. +65 251 6500 slovakia: see austria slovenia: see italy south africa: s.a. philips pty ltd., 195-215 main road martindale, 2092 johannesburg, p.o. box 58088 newville 2114, tel. +27 11 471 5401, fax. +27 11 471 5398 south america: al. vicente pinzon, 173, 6th floor, 04547-130 s?o paulo, sp, brazil, tel. +55 11 821 2333, fax. +55 11 821 2382 spain: balmes 22, 08007 barcelona, tel. +34 93 301 6312, fax. +34 93 301 4107 sweden: kottbygatan 7, akalla, s-16485 stockholm, tel. +46 8 5985 2000, fax. +46 8 5985 2745 switzerland: allmendstrasse 140, ch-8027 zrich, tel. +41 1 488 2741 fax. +41 1 488 3263 taiwan: philips semiconductors, 6f, no. 96, chien kuo n. rd., sec. 1, taipei, taiwan tel. +886 2 2134 2886, fax. +886 2 2134 2874 thailand: philips electronics (thailand) ltd., 209/2 sanpavuth-bangna road prakanong, bangkok 10260, tel. +66 2 745 4090, fax. +66 2 398 0793 turkey: yukari dudullu, org. san. blg., 2.cad. nr. 28 81260 umraniye, istanbul, tel. +90 216 522 1500, fax. +90 216 522 1813 ukraine : philips ukraine, 4 patrice lumumba str., building b, floor 7, 252042 kiev, tel. +380 44 264 2776, fax. +380 44 268 0461 united kingdom: philips semiconductors ltd., 276 bath road, hayes, middlesex ub3 5bx, tel. +44 208 730 5000, fax. +44 208 754 8421 united states: 811 east arques avenue, sunnyvale, ca 94088-3409, tel. +1 800 234 7381, fax. +1 800 943 0087 uruguay: see south america vietnam: see singapore yugoslavia: philips, trg n. pasica 5/v, 11000 beograd, tel. +381 11 62 5344, fax.+381 11 63 5777 printed in the netherlands 545006/02/pp 40 date of release: 2000 jan 18 document order number: 9397 750 06688

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